|Battery-powered devices are trapped by trends. Better performance requires more power, battery technologies are improving slowly, and users want their devices to last as long as they do today or longer. A way to escape this trap is to design energy proportional devices leveraging power-proportional hardware architectures that deliver good performance when needed and consume little power when idle. Design of energy proportional devices is hampered by the abstraction of application, operating system and hardware component designs from each other. The goal of power-agile computing project is to come up with new definitions and algorithms to guide hardware software co-design process. In the process, we define energy proportionality formally and introduce the concept of power agility. We come up with cross-layer interfaces; application and operating system layers, and operating system and hardware layers. We are working towards using these interfaces to tune individual hardware components power settings in order to achieve overall system energy proportionality.Because most device components are tuned to operate efficiently within a narrow power-performance range, we expect future power-proportional architectures to be increasingly heterogeneous: featuring multiple different processors, memory banks, storage devices and radios, each component embodying a particular power-performance tradeoff. Heterogeneity will produce a single device that can morph into many others: phones that can sprint like a laptop and sleep like a sensor node.
This is a collaboration with the Blue research group at University at Buffalo
Contributors: Geoffrey Challen http://www.cse.buffalo.edu/people/?u=challen
“CSR: Medium: Collaborative Research: Architecture and System Support for Power-Agile Computing.” 8/1/2014 – 7/31/2016. $278,836 (Drexel Portion). National Science Foundation (NSF)